资源列表
vga_box
- 一个用verilog语言实现的包含：键盘扫描，led驱动、vga视频输出的例子。功能为用键盘控制一个方块的显示位置。需要有fpga板子支持。
CPU-design
- 使用VHDL语言开发的CPU硬布线设计，在实验电路可以使用加法，和减法与或等简单操作-CPU using VHDL language development of hard-wired design, the circuit can be used in the experimental addition, and subtraction or other simple operations with
CCD285_DRIVER_11927
- a ccd driver code,wirte in verilog,there are some error in the timing analyzer in the report after full compiled ,but the wafes on oscillograph are successful
AD9362
- 一种基于xilinx S6，verilog语言，实现AD9362,IDDR ODDR接口的设计，已经过实际测试-Based xilinx S6, verilog language, achieve AD9362, design IDDR ODDR interface, has been the actual test
FIFO
- vhdl code for FIFO implementation
88fifovhdl
- 88位进出缓冲器8*8位的fifo数据缓冲器的vhdl源程序 编了个8*8位的fifo数据缓冲器的vhdl源程序，是经过quartusII4.2编译成功的程序。。希望能跟各位交流-88 out of 8* 8-bit buffer fifo data buffer vhdl source Bianle Ge 8* 8-bit data buffer fifo vhdl source code is compiled through quartusII4.2 successful progra
uart_my
- 自己设计的串口verilog代码，已在fpga上跑过，问题无误。-Serial verilog design code, ran in the fpga, correct the problem.
decode
- codes for different modules in verilog
cordic
- cordic一次移位，需要多次的话可以通过多次条用-codic algorithm unit
LBJ
- SPI接口协议，将spi总线转换成为LOCALBUS总线-SPI interface protocol, the spi bus converted into LOCAL BUS bus
00
- 用VHDL语言调用IP核，在ISE中实现三角波-VHDL IP core with the realization of the triangular wave is called
manchester
- verolog语言编写，功能如标题所示。有问题请联系mxkmxm@126.com-verolog language, functions such as the title indicates. There are problems, please contact mxkmxm@126.com