资源列表
stopwatch
- The program is written in verilog to accomplish functions of a stopwatch. It can be implemented in Xilinx FPGA spartan 3 board.
rd_utilities
- verilog utilities such as buffers, invertersm and gates, etc
Dc-motor-control-procedures
- 该代码是直流电动机控制的汇编程序，在简单的单片机最小系统上即可实现对直流电机的控制。-This code is the direct current motivation control assembly program, in simple single chip minimize system can be realized on the control of a dc motor
I2C
- 关于I2C总线协议的verilog代码，里面包括了3个verilog代码-I2C bus protocol verilog code, which includes three verilog code
rgb2yuv
- 用VHDL和verilog编写的RGB颜色空间到YUV颜色空间的转换程序, 是FPGA视频处理中的常用程序!-Written in VHDL and verilog using RGB color space to YUV color space conversion process is commonly used in video processing FPGA program!
clock
- 1.计时功能：包括时、分、秒的计时 2.定时与闹钟功能：能在设定的时间按发出闹铃声 3.校时功能：对小时、分钟和秒能手动调整以校准时间 4.整点报时功能 5.利用数码管显示时间-1. The timer function: including, minutes and seconds when the timing 2. The timing and alarm clock function: set time out according to the alarm 3.
FSM
- 这是一个有限状态机的设计，并且用来测试一个学列，七段数码管输出检测序列的值，有限状态机用三段式编写。- This is a finite state machine design, and used to test a school, seven-segment digital output detection sequence value, the finite state machine with three-stage preparation.
UART
- VHDL语言写的串口发送、接收程序，根据晶振和相应的波特率修改分频器就可以实现！-Written in VHDL serial send, receive, process, according to crystal and the corresponding baud rate divider changes can be achieved!
usb
- 实现usb的通信，实现计算机和FPGA之间的同信-Realization of USB communication
PID-controller
- 用VHDL设计的PID控制器，带有VHDL测试平台代码-PID controller designed with VHDL,with VHDL testbench code.
elecfans.comMPSK
- 用VHDL实现的基带信号进行MPSK调制 及串并转换-Achieved using VHDL baseband MPSK signal modulation and SERDES
digital-clock
- Project of digital clock made in vhdl code.