资源列表
frequence
- 基于FPGA设计的数字频率计，用VHDL写的代码。。。。有6各模块
DS1820
- DS18B20的驱动程序，可直接调用，不能实现小数显示，只能采集俩位整数值-DS18B20 driver can be called directly, can not be achieved decimal display, only integer values collected Liang Wei
mux4_to_1
- this files in quartus2 are 4 to 1 mux
Source
- PWM的Verilog HDL代码用于FPGA
newlcd
- LCD屏幕的verilog描述，很实用的源代码，适用于初学者的号代码-LCD of verilog
FIFO
- 该代码为FIFO代码，编译环境为Quartus/Xilinx,语言为VerilogHDL-The code for the FIFO code, compile environment Quartus/Xilinx, language VerilogHDL
horloge
- Asm Routine for Horloge for PIC
Lab-PS2
- implementing PS2 interface on Spartan-3E FPGA Kit (including the ucf file + PS2 module + main moudel as top level )
UART
- VHDL实现UART模块 可以实现与pc机的通信-VHDL realize UART module
ddswase
- dds信号发生器，可以产生任意频率的正弦波，发波和谐波.已经编译通过
ShiftOut
- vhdL还有fpga和verilog非常有用的嵌入式串并的源代码-vhdL also very useful verilog fpga and embedded string and source code
DAIMA-BLACK
- VHDL 语言的 能量感知的基础算法及sin 查表法 HEX，9-256-Energy VHDL language and perception on the basis of the algorithm sin lookup table HEX ,9-256