资源列表
7210040034_Yasifa-Rakhma_ProjectAkhir
- REPORT OF Embedded System VHDL 3-to-8 Decoder using a For-Loop
Cont_THS1207
- FPGA控制THS1207多通道ADC的verilog源代码-FPGA control THS1207 multi-channel ADC' s verilog source code
responder
- 实现四路抢答器功能，主持人可以控制抢答开始，也可以将各个抢答器清零-Responder function to achieve four-way, the host can control the answer in the beginning, you can also clear the various Responder
CJ2
- 关键词：清华大学计算机系 计算机组成原理大实验 多周期cpu工程源码，为学弟学妹造福-Keywords: Department of Computer Science Computer Composition Principle experimental multi-cycle the cpu Engineering source for the benefit of mentees
TimeQuest-must-be-done
- 关于fpga 的时序问题的说明。时序问题一定要搞定。-The timing of the problem about the fpga descr iption. Timing problem must be done.
MSK
- FPGA中实现的MSK调制，带modelsim仿真。实际系统测试通过：载波和调制波信号频率可调。调制框图请参见樊昌信 通信原理247页-MSK modulation implemented in FPGA with modelsim simulation. The actual test system: a carrier wave signal and the modulation frequency is adjustable. See Fan Changxin modulation blo
VGA
- VGA controler, langguage: Verilog and VHDL
cordic
- cordic的verilog设计，qII实现，比较简单，讲诉了算法的实现过程。-cordic the verilog design, qII implementation, relatively simple complaints about the implementation process of the algorithm.
FPGA-BOXING
- 基于FPGA的波形发生器，通过QUARTUS ii 软件，用VHDL语言编写的波形发生器-FPGA-based waveform generator, QUARTUS ii software waveform generator using VHDL language
MP3-design-using-verilog
- 基于Xilinx XUPV2P平台(FPGA开发板)的MP3播放器设计-MP3 player design based on the the Xilinx XUPV2P platform (FPGA development board)
61EDA_D159
- 正弦波 发生器,VHDL的应用和处理,可以产生任意波形
shouhuojixi1
- 自动邮票售货机，选择要购买的邮票，直接投入硬币就可以购买。(Automatic stamp vending machine, select the stamps to buy, directly into coins can buy.)