资源列表
m4k-example
- FPGA中M4K的使用例子，比如rom ram-the example to useing M4K in FPGA
fpga2
- fpga 基础篇 对初学者有用 好好看看 挺好-fpga
adder
- adder in verilog only with combinational logic use
Vendor
- 用verilog编写的自动售货机，基于Basys2平台，共有3种物品可以选，分别为4元，2.5元，1元，可以投入3种类型的货币，分别为1元，5元，10元，共有5个状态。-This is a vending machine which is written by verilog on Basys2 board.
add
- 北京邮电大学VHDL课程作业，基于xilince ISE试验箱开发的，可以做简单的半加器加法-Beijing University of Posts and VHDL course work, based xilince ISE chamber developed, can do simple addition of half-adder
c16_latest.tar
- c16 ucore. this a 16 VHDL cpu core. complete with Assembler and C compiler. All src code included.-c16 ucore. this a 16 VHDL cpu core. complete with Assembler and C compiler. All src code included.
conv_encoder(rate=1_2)
- 这是用ISE编写的verilog语言1/2码率的卷积编码的代码-It is written in verilog language ISE convolution coding rate 1/2 code
PWM_Module
- Very clean design of a PWM module made in structural VHDL. Lower blocks are behavioral.Designed in Quartus 9.0,
Oscilloscope
- 用verilog语言编写的数字示波器，在tft 2.4英寸液晶上显示波形、峰值等。-Verilog language with a digital oscilloscope, in tft 2.4 inch LCD display waveforms, peak, etc.
aaa
- 基于ARM和FPGA的嵌入式运动控制器的研究-Based on the ARM and FPGA embedded motion controller based on
lcd1602_new
- 1602 的简单动态显示的代码对于verilog 的1602代码-1602 simple dynamic display code code verilog of 1602
CRC32.zip
- VHDL CRC32 VHDL CRC32,VHDL CRC32 VHDL CRC32