资源列表
sim_Xilinx综合与仿真设计指导
- Xilinx自己出的仿真设计指导，使用vivado工具必备参考资料。(The Synthesis and Simulation Design Guide provides a general overview of designing Field Programmable Gate Array devices using a Hardware Descr iption language. It includes design hints for the novice HDL user, as w
S8_test
- 本程序用来测试开发板上所有的设备。 1、VGA输出8位色彩的条纹； 2、PS/2键盘输入字符可以传输到LCD和串口调试终端上； 4、拨码与按键开关与4位LED相连-The procedure used to test all the equipment development board. 1, VGA output 8-bit color stripes 2, PS/2 keyboard input characters can be transmitted to the LCD
FPGA
- FPGA实验（精华）,包括过个试验，是学习者的好书-FPGA experiment (essence), which included pilot, is the learner' s books
waveletcg_example
- 一维小波变换一层重构，实现MALLAT算法重构，经测试完全正确。-Layer of one-dimensional wavelet transform reconstruction algorithm to achieve MALLAT reconstruction, tested entirely correct.
CPU
- 用VHDL编的简易CPU，可完成加减乘法移位等功能
yidong_top_xu
- 本实验实现了一个小的乒乓游戏，VGA显示,代码下载的FPGA板子上验证通过，效果很好。-The experimental realization of a small ping-pong game, VGA display, download the code verified by the FPGA board, with good results.
FPGA_Xilinx
- FPGA设计高级技巧Xilinx篇讲述高级技巧-Xilinx FPGA design articles about high-level skills in advanced skills
ecpu_alu
- This a code describing the arithematic logic unit of any device. It performs operations such as addition subtraction and logic operations too. It is coded in verilog.-This is a code describing the arithematic logic unit of any device. It performs ope
pwm_8.7
- 基于verilog产生多路PWM波形。频率、脉宽可调。带有延时-Based verilog generate multiple PWM waveform.
atop
- 该程序可以测量外部频率的频率计电路，包含顶层模块，和底层模块。-The program can measure the frequency of the external frequency meter circuit, including the top-level module and bottom module.
MID_FILTER
- 中值滤波算法的verilog实现，可用于相关算法在基于FPGA的嵌入式图像处理系统中。-Median filtering algorithm verilog realization available FPGA-based embedded image processing system.
ASIC-design
- ASIC设计方面的书籍，微电子专业常用的。-ASIC design books, Microelectronics common.