资源列表
spi_VHDL
- 关于SPI应用VHDL程序。供新手学习用。
cic
- 积分梳状滤波器的硬件实现，主要是实现在允许范围内进行抽取滤波，实现数据压缩-failed to translate
sram__
- 静态随机读取存储器行为模型，可以应用于modelsim环境的仿真。-static random acts of reading memory model can be applied to the simulation environment modelsim.
DPLL_verilog
- 一阶全数字锁相环VERLOGIC程序代码，调试通过。
xiangweileijiaqi
- 相位累加器，是数字频率合成器的重要组成部分。这是verilog代码。-Phase accumulator, digital frequency synthesizer is an important part. This is the verilog code.
AD1674
- This is an interface in HDL for the AD1674 ADC converter.
WATCHDOG
- WATHCHDOG 代码，功能足够强大，公司级应用也可，适合有一定基础的学习。-WATHCHDOG code, powerful enough to company-level applications, suitable for a certain basis for learning.
ROM
- ROM模块，功能在于，是创建一个简易的rom模块-rom
floatmultiplierVHDL
- 32为浮点数乘法的vhdl源代码，嵌入式系统中有可能会用到，基于fpga硬件实现-32 for the floating point multiplication vhdl source code, embedded systems may be used, based on fpga hardware
IO-Port-Programming
- 8051 source code for understanding I/O port operation and commands
Lab_LCD
- Building a character LCD interface on Spartan-3E FPGA
CRC
- 利用VHDL语言,用FPGA设计一个数据通信中常用的数据检错模块—循环冗余校验CRC模块,选用当前应用最广泛的EDA软件QUARTUS II作为开发平台-Using VHDL, FPGA design of a common data in data communication error detection module- Cyclic Redundancy Check (CRC) module, currently the most widely used EDA software QUAR