资源列表
13_ds1302
- FPGA实现ds1302的控制，用verilog语言编写，黑金开发板-The FPGA implementation of ds1302 control, written in verilog language, black gold development board
14_key
- FPGA实现按键的控制，用verilog语言编写，完整工程代码-Control of the FPGA implementation buttons, written in verilog language, complete project code
18_uart
- FPGA实现uart的通信，用verilog语言编写，UART是常用的通信方式，值得学习-The FPGA implementation of uart communication, written in verilog language, uart is a common way of communication, worth learning
02_run_flash_led
- FPGA实现FLASH与led的控制，用verilog语言编写，flash使用外部芯片，值得学习-The FPGA implementation FLASH with led control, written in verilog language, FLASH using external chip, worth learning
ofdm
- OFDM VHDL SOURCE CODE
cnt100
- 一百进制计数器，采用层次化设计，底层文件为十进制计数器，顶层文件原理图设计-the procedure is based on vhdl,it can count 100,and use top-down
PS_PLcommunication
- ZYBO开发板的PS与PL通讯简单实例，PL配置switch和led，PS对switch的输入进行处理并赋值给led，点亮相应的灯。-PS and PL communication simple examples ZYBO development board, PL configuration switch and led, PS to switch inputs are processed and assigned to the led, light the corresponding lig
purePLcode
- 基于ZYBO的纯PL编程，虽然加入了PS的IP但是并未对其进行编程。基本功能为通过switch0控制led的点亮与否，完全通过PL部分实现。下载代码是即使只下载FPGA也可以。-Based ZYBO pure PL programming, although the added PS of IP but did not program them. The basic function of the lighting control led by switch0 or not fully real
21ic_VIVADO-verilog
- vivado 下的可逆计数器项目，使用VERILOG语言编写，基于FPGA -vivado 下的可逆计数器项目，使用VERILOG语言编写，基于FPGA v
lzp
- 用Quartus生成一个10KHZ的正弦波-10KHZ generate a sine wave with Quartus
comp8_1
- 使用quartus软件编写VHDL语言一个比较器程序-Quartus software using VHDL language to write a program comparator
add_sin
- 使用quartus软件编写VHDL语言一个累加器程序-Quartus software using VHDL language to write a program accumulator