资源列表
de2.1
- 这是一个基于FPGA/SOPC设计的简单串口程序，是FPGA硬件和niosII软件编程的结合。对初学者有很大的借鉴意义。在Quartus6.1和niosII6.1环境下编译通过，并且下载到板子上运行成功-This is based on FPGA/SOPC design a simple serial program is FPGA hardware and software combination niosII. Great for beginners reference. In Quartu
VERILOG
- verilog基础知识与快速提高练习,包括verilog的语法知识，以及一些基本操作-verilog
fpga_12
- fpga design 2 by zip file
fpga_13
- fpage design 3 by zip file
pctr
- verilog high discr iptive language
CircuitDesignwithVHDL[1]
- 这主要是学习vhdl和fpga设计的一些资料-study for vhdl and fpga
CPLD
- 复杂可编程逻辑器件的初步介绍，通过一系列的简单例子，帮助读者熟悉开发环境和开发语言。-CPLD initial introduction, through a series of simple examples to help beginners master the basic development process
DES
- DES加密算法的VHDL实现,采用流水线技术实现-The VHDL implement of DES encrypt algorithmic
counter
- 这是用VHDL设计的十进制计数器，两个VHDL程序分别说明了out和buffer的区别-It is designed with VHDL decimal counter, the two VHDL procedures were illustrated the difference between out and buffer
Verilog-HDL-code
- verilog 经典例子的源码 非常适用于初学verilog的朋友们-classic example of verilog source code
VHDL
- VHDL例子一百个，教会你如何使用VHDL-one hundred of examples for VHDL
shift
- Simple shift register with testbench in vhdl