资源列表
KEY
- 使用verilog编写的用按键控制LED灯，对于初学者是很好的锻炼(Using the key to control the LED lamp with Verilog is a good exercise for the beginner.)
他和它的故事 VerilogHDL之系列笔记
- 他和它的故事之一些对verilog实验的思考和笔记。(Some thoughts and notes on the Verilog experiment.)
Receiver_spartn6_v1
- Implement design of UART receiver in verilog
bcd counter
- Binary counter design in verilog
Verilog教程-夏宇闻
- verilog 教程 PPT版本 语法 结构 设计技巧等(Verilog tutorial PPT version)
PLL
- verilog编写的锁相环程序。可以对照参考(Verilog prepared by the phase-locked loop program. Can control reference)
ethernet_interface_20160424_A
- 基于Xilinx Spartan-6开发板，实现以太网通信(Ethernet communication)
imports
- 用FPGA实现UDP/IP协议，对于想用FPGA实现UDP/IP协议的可以看一看(Implementation of UDP/IP protocol with FPGA)
Viscosity_1.7.7[sn]
- Viscosicty is a vpn app
frequency divider and testbench
- a frequency divider and test bench with simulation results
epm240_example
- VHDL代码，共10个程序，分别是1分频器2状态机3计数器4拨码开关对应数码管显示5键盘及显示6键盘显示7交通灯8汉字滚动9ADC0804直流采样和显示10正弦波发生器(A total of 10 procedures, namely, 1 frequency dividers, 2 state machines, 3 counters, 4 dial switches, corresponding to digital tube display 5 keyboard and display 6
risc_spm_v14
- 使用Altera CycloneIV 用Verilog语言实现一个精简指令集cpu(Using Altera CycloneIV to implement a streamlined instruction set CPU in Verilog language)