资源列表
VGA显示8色彩条和方格
- VGA驱动，基于verilog语言，平台EPC4(sdfdsssadadadsadadasdadad)
5L_SVPWM_ANPC_CPLD
- 基于CPLD硬件描述语言编写的五电平SVPWM脉冲触发程序(Five level SVPWM pulse trigger program based on CPLD hardware descr iption language)
multi_booth
- booth乘法器,实现普通booth乘法算法(Booth multiplier to implement the common Booth multiplication algorithm)
二进制码转化为ＢＣＤ码源程序
- 二进制码转化为ＢＣＤ码源程序,VHDL在FPGA验证(Conversion of binary code into BCD code source program)
ＢＣＤ码转化为七段码源程序
- ＢＣＤ码转化为七段码源程序。VHDL在FPGA验证(Conversion of BCD code into seven segment code source program)
I2CHDL
- IIc时序逻辑的VHDL源代码，便于时序的调试(VHDL source code of IIc time series logic, easy to debug time series)
MaxplusII_Altera
- MaxplusII_Altera片上编程的使用说明(Instructions for programming on MaxplusII_Alter)
SPANING_27BIT
- spanning tree adder writtern vHDL Code
csa_codes
- carry_select_adder for 16-bit in verilog
Asynchronous FIFO Architectures
- 老外的经典异步FIFO结构讲解，一共三个部分。(Asynchronous FIFO Architectures Vijay A. Nebhrajani)
LED
- 利用verilog语言，在FPGA开发版上点亮LED灯(Using verilog language, LED lights on the FPGA development version)
PLL_test
- 用FPGA实现锁相环分频，将基准时钟频率通过PLL核分频生成多种时钟生成。(Phase-locked loop with FPGA to achieve frequency division, the frequency of the reference clock through the PLL core frequency to generate a variety of clock generation.)