资源列表
Lab4
- 布斯(Booth)乘法器是一種透過編碼後再運算所得到較佳效能乘法器 請嘗試描述說明 1. 布斯乘法器原理 2. 布斯乘法器組成架構 3. 並嘗試完成布斯乘法器(The Booth multiplier is a better performance multiplier that is encoded and then computed Please try to describe the descr iption 1. Booth multiplier principle Boo
vip_ex1
- 特权FPGA开发板上的例程，PLL初始化配置和LED点灯(The routines on the privileged FPGA development board, the PLL initialization configuration and the LED light)
counter
- 1. 支持递增/递减/增减可配置 2. 支持计数器使能可配置 3. 支持8位计数器(Add mode, subtraction, add and subtract mode, hold mode)
sdr_sdram
- sdram使用接口仿真，altera公司ip使用方法(sdram verilog. SDRAM using interface simulation, Altera company IP use method)
DACAD9708
- DAC_AD9708的verilog hdl 代码，简单易懂，AD9708为top文件，需要自己配置只读存储器，输出正弦波。(DAC_AD9708 verilog HDL code, AD9708 for top file, need to configure read only memory, output sine wave.)
led
- fpga的一个流水灯程序，芯片信号是ep4ce6f17c8n(A flow light program for FPGA.)
02_run_flash_led
- FPGA烧录程序到flash的工程例子，芯片信号是EP4CE6F17C8N(FPGA burn program to flash engineering example, the chip signal is EP4CE6F17C8N)
03_key_detect_1
- FPGA开发板按键历程，芯片型号是 EP4CE6F17C8N(FPGA development board key process, the chip model is EP4CE6F17C8N)
04_key_detect_2
- 第二个FPGA开发板按键工程，芯片型号是 EP4CE6F17C8N(FPGA development board key process, the chip model is EP4CE6F17C8N)
09_vga
- FPGAvga的使用完整工程例子，芯片型号是 EP4CE6F17C8N(FPGAvga's use example, the chip model is EP4CE6F17C8N)
frequency
- 用于FPGA开发，使用VERILOG语言编写，并在QUARTUS II仿真平台仿真，实现频率计的功能。(It is used in FPGA development, written in VERILOG language, and simulated on the QUARTUS II simulation platform to realize the function of the frequency meter.)
HDB3
- 按照要求对“数字基带信号HDB3译码器设计与建模”进行逻辑分析，了解HDB3译码器译码原理，了解各模块电路的逻辑功能，设计通信系统框图，画出实现电路原理图，编写VHDL语言程序，上机调试、仿真，记录实验结果波形，对实验结果进行分析。(In accordance with the requirements of the logical analysis of the design and modeling of the digital baseband signal HDB3 decoder, H