资源列表
夏宇闻数字逻辑设计.pdf
- 顺序操作和并行操作，是新手们很容易混乱的一个重点。但是为了将低级建模发挥到极 限，这一点必须好好的理解.(Sequential and parallel operations are a key point of confusion for beginners. But in order to bring low-level modeling to the limit, this must be understood.)
LAB2
- zynq上实现流水灯的软硬件协同设计，利用vivado 2015.2版本eda软件开发。(Zynq realizes the design of hardware and software of water lamp, and uses vivado version 2015.2 EDA software to develop it.)
UART
- UART串口通信模块：包括接收模块RXD、发送模块TXD、分频模块FREDIV(UART serial communication module: including receiving module RXD, sending module TXD, frequency division module FREDIV)
Nitro-Parts-lib-SPI-master
- Nitro-Parts-lib-SPI Verilog SPI master and slave
spi_mem_programmer-master
- spi_mem_programmer A simple verilog module for programming (Q)SPI flash memories
verilog_spi-master
- verilog_spi A simple demo SPI interface implemented in verilog
spiVerilog-master
- spiVerilog A Verilog SPI module
实验10 输入捕获实验
- 输入捕获实验 捕获高电平 低电平 实现定时中断(The input capture experiment captures the high level and low level to achieve timing interrupts)
实验13 TFT LCD显示实验
- 基于stm32的lcd显示实验，可以更好的显示数据(STM32 based LCD display experiment, you can better display data)
plj
- 2秒闸门时间频率计，以及一个分频器，使用FPGA及verilog语言实现(2 second gate time frequency meter)
自适应滤波器
- 自适应滤波器的VHDL代码，网上找的，经过整理，编译可以用，希望对大家有帮助(Adaptive filter VHDL code, online search, after finishing, compile, you can use, I hope all of you help)
breath led
- 这个是呼吸灯的verilog的程序，下载解压即可用，适合新手