资源列表
iir1
- 实现iir滤波器的设计，代码比较前面，只要是正当ti公司的tms54x开发。-Implement iir filter design, code compare the front, as long as proper ti' s tms54x development.
quartus2-crack
- modelsim注册license解码解码-ModelSim license decoder decoding Register
cic_40Mhz
- 40MHz的CIC滤波器的FPGA设计，内容很完备-CIC filter of FPGA design in 40MHz，content is complete
jishuqi
- 各进位计数器，包括16位，10位，4位都齐了-The binary counter, including 16, 10, 4 all here
add16
- 基于FPGA的VERILOG语言的四联十六进制的加法程序-Based on quadruple hexadecimal addition program the FPGA VERILOG language
ccp
- Example programming for PIC c-Example programming for PIC cpp
verilog
- verilog code for the decription of the fsm of the controller
vhdl
- 数字密码锁的设计 这是本人一周实习 实现的，完全正确，请放心！-vhdl sheji
proje-vhdl
- ASYMMETRIC LARGE SIZE MULTIPLIERS WITH OPTIMISED FPGA RESOURCE UTILISATION
wsjscsq
- VHDL程序设计的应用举例：伪随机数产生器-VHDL Programming Application examples: pseudo-random number generator
LEDPWM
- LED台灯程序带有红外遥控功能..资源：p1 口,数码管。p3.4,p3.5 亮度控制按键P3.0 PWM端口,p3.1 蜂鸣器报警-LED lamp with infrared remote control program
cpu
- 一份精简指令cpu源代码，用verilog编写，已经通过仿真验证，可以模块化移植。-This is a file of cpu code. The cpu is risc cpu. It is simulated and verificated.And the cpu can be transplanted as a module.