资源列表
led7219
- MAX7219驱动程序，应用于cyclone 1c12，电子设计大赛使用过的-MAX7219 driver, used in the cyclone 1c12 used by the Electronic Design Contest
jiaotongdeng
- 交通灯，实现的功能：L0.0 主路红灯 L0.1 主路黄灯 L0.2 主路绿灯 L1.0 支路红灯 L1.1 支路黄灯 L1.2 支路绿灯-Traffic lights, functions: L0.0 main road red L0.1 main road yellow L0.2 main road green L1.0 slip red L1.1 slip yellow L1.2 green branch
cqfpp
- CQF filter characteristics with higher
dcfq
- D触发器，适合初学者，上实验课的时候用杠杠的-D flip-flop, suitable for beginners, on the experimental course of a lever! ! !
manchester-decoder-encoder
- Manchester Encoder - Decoder-Manchester Encoder- Decoder
naozhong
- 基于FPGA的闹钟系统的设计的源程序，VHDL语言-The Design of Alarm Clock System Based on FPGA
urunn_length_s
- <p>用verilog 开发应用于图像压缩编码中使用行程长度编码(run lengthencoding，RLE)对交流系数(Aa)进行编码。</p> -<p> With verilog development for image compression using run length encoding (run lengthencoding, RLE) coding to encode the exchange coefficient (Aa). <
half_adder
- architecture descr iption of half architecture adder :)-architecture descr iption of half architecture adder :)
santhosh_verilog_adder
- This has code off multibit Adder. IT is written in verilog. The associated test bench for the verilog code is also attatched within the rar file. Uncompress the rar file and the file name describes the function of each code file.. Comments are we
OR
- VHDL code for OR gate
RCA
- ripple carry adder design using verilog
VHDL
- 有人用FPGA控制过液晶屏吗（vhdl)