资源列表
auto_w_r_spi
- 能够自动读写SPI ROM的控制器，读写的资料直接放到fifo中，经过实际的班子验证，很好用。-Can automatically read and write SPI ROM controller, read and write data directly into fifo, after the actual verification team, very good use.
chuzuchejifei
- 出租车计费器，VHDL编写。供参考-Taxi meter, VHDL writing. Reference
l34_parser
- 报文解析，用来判断是否为正常报文及报文分类-Packet analysis, to determine whether a normal packet and packet classification
s-box
- 用Verilog语言描述的des的s盒（des s盒 Verilog代码） -Verilog language descr iption des s box (des s box Verilog code)
BasicRSA
- RSA加密算法的VHDL实现，通过实际FPGA验证。
FSMpart5
- FSM Verilog implementation of the final part of lab 7 of altera s verilog tutorial for de2115 fpga.
pgvhdl3
- document word vhdl spwm
manchester_verilog
- 用verilog写的一个manchester code的代码，含编解码-Used to write a verilog code for manchester code containing codec
Clock
- 该程序主要是用Verilog HDL语言编写的多功能数字钟，包括校时，调试，整点报时和万年历模块。-The program is mainly used Verilog HDL language multifunction digital clock, including at school, debugging, the whole point timekeeping and calendar modules.
CPLD_CODE1
- ju继续上载CPLD的黄金参考源代码，希望对电子爱好者有所帮助-ju continue on the CPLD gold reference source, and I hope to help e-lovers
FPGA.rar
- 24秒倒计时设计用于专业篮球比赛有说明和一系列程序代码,24 seconds countdown designed for professional basketball game and a series of procedures has made it clear that the code
CLA
- microSD卡资料.开发可以参考。