资源列表
FPGAluojidaima
- 16通道逻辑分析仪，100M，FPGA代码，包括FIFO，dram，usb等-16 channel logic analyzer, 100 m, the FPGA code, including FIFO, DRAM, usb, etc
20111122_4
- G711 defines two main compression algorithms, the µ -law algorithm (used in North America & Japan) and A-law algorithm (used in Europe and the rest of the world). The code provide codec in VHDL-G711 defines two main compression algorithms, the &#
RS(204-188)decoder
- It is the Reed Solomon Decoder Technique for finding tha errors in the CDs and Hard Drive disk. It is a part of recovery tools.
rs_decoder_31_19_6_latest.tar.
- RS解码器的FPGA实现，有TestBench,RS decoder FPGA to achieve, there TestBench
vspi
- VSPI special module with included docs
playmusic_0414
- 基于FPGA的乐曲发生器设计 -Design of FPGA-based music generator music generator design based on FPGA
adder
- 四位二进制串行加法器 VHDL语言 EPM240 数字逻辑实验-Four serial binary adder VHDL language EPM240 digital logic test
MySDTEST
- 读取F16文件系统的SD卡里面的bmp文件-To read bmp file of F16 file system on SD card
ps2_verilog
- ps2_键盘控制器源码verilog源码，是一个不错的代码
SPI_verilog_vhdl
- SPI串口的内核实现 分verilog和HDLC实现
jiandandezuheluojidianlusheji
- 四舍五入判别电路。 设计一个四舍五入判别电路，其输入为8421BCD码，要求当输入大于或等于5时，判别电路输出是1，反之为0。-Rounding discrimination circuit. Design a rounded discrimination circuit, the input 8421BCD code requirements when the input is greater than or equal to 5, the discrimination circuit o
SPI_verilog_vhdl.rar
- SPI串口的内核实现（分别使用verilog和vhdl语言描述的）,The core of the realization of SPI serial port (using Verilog and VHDL language descr iption of the)