资源列表
43680540SPI_Core
- Verilog for SPI Core source code
electric_bell
- 电子打铃器 在max plus 2 下编译通过-electronic bell playing for the max plus 2 under through compiler
ddr-sdram--chengxu
- ddr的控制程序，实用Verilog语言实现的非常的具体，非常无奈过的实用。-ddr
Swp
- A simple Swapping VHDL Program
Example-b8-3
- 使用DO文件进行仿真的基本方法,包含基本操作步骤-The basic method of using DO file for simulation，include basic steps
MPPT-source-code-based-on-FPGA
- 用Verilog Hdl语言实现的光伏系统最大功率跟踪的源代码，内包含程序解释说明。-Use Verilog Hdl language implementation of photovoltaic maximum power tracking system source code, contained within the program descr iption .
exon
- 具有音乐报时功能的数字时钟,代码就在word文档里-Music with timekeeping function digital clock
counter
- 用4个T触发器组成16位的计数器，FPGA实验ALTER DE2开发板自带光盘的案例程序解析-Four T flip-flop 16 of the counter, the case of FPGA experiment ALTER DE2 development board comes with CD-ROM program parse
Quartus_II_9.0_SP1_pojieqi
- Quartus_II_9.0_SP1破解器-See the file name
GUNMAOJI
- 全自动伺服驱动压销滚铆plc程序，日本进口的滚铆机原码-PLC
FullAdder
- 四位全家器的VHDL语言模块，已经在ISE8.1上经过测试通过-family of four VHDL modules, has been tested on ISE8.1 through