资源列表
VHDL-Binary-counter
- Binary counter, its used to count the numbers in binary format
verilogtemplete
- it is a verilog templete
4_bit_counter
- 4 bit counter with vhdl code
lcd_at_nios_nii_part
- 彩屏液晶在FPGA使用，硬件描述语言写的，速度快-Color LCD used in the FPGA, hardware descr iption language writing speed
pro002_keyboard
- 键盘鼠标的源码及约束（verilog）已用FPGA实现-Keyboard and mouse the source and constraints [verilog] has spent FPGA realize
VHDL
- vhdl讲解文档，里面详细叙述了vhdl的具体语法和用法-vhdl the document, which details the specific syntax and usage vhdl
dac_adc
- vhdl dac_adc.mdl its sysgen model file for xilinx platform
vhdl1
- vhdl设计实例一：时序逻辑，组合逻辑的设计实例-vhdl Design Example One: sequential logic, combinational logic design example
core
- OpenOCD内部Jtag层核心代码。OpenOCD可以使用户通过C代码仿真模拟Verilog-core of OPENOCD s JTAG
digital-clock-VHDL
- 数字电子钟的VHDL硬件描述语言实现，可以用quaturs软件实现。-digital clock based on VHDL
verilog
- 是几个用Verilog HDL语言编写的源代码（里面包括实现滤波器等），对想学习这个语言的朋友很有帮助！
pinlvji
- 利用单片机实现数字频率计，4位数码管显示-Single-chip digital frequency meter, 4 digital tube display