资源列表
adder_s
- 八位并行加法器，同时进位，利用VHDL语言，在ISE环境中建立工程-Eight parallel adder
DE2_CCD
- CCD驱动,用于显示130万像素的摄像头。-CCD driver
B1
- Begining code for manhester decoder
ADC08041wei_cpld240t105
- vhdl 编写的adc0804的程序，用在cpld240t105上面-vhdl prepared adc0804 of the program, used in cpld240t105 above
comparator
- 设计数字电路的基础教程可以给学生提供好的基础-Digital circuit design based tutorials can provide a good basis for students
Quartus_CRACK
- Quartus_CRACK_license.dat破解文件，对初学软件的朋友有用。-Quartus_CRACK_license.dat crack file, be useful for beginners software friends.
traffc_lght
- my project code of traffic light controller in vhdl
QuartusII5.0Crack
- QuartusII5.0破解license，用于quartusII5.0的破解，需要改网卡号-QuartusII5.0 license
verilogsram
- 用FPGA实现SRAM读写控制的Verilog代码-SRAM FPGA implementation using Verilog code to read and write control
dianti
- VHDL语言编写，实现四层电梯的仿真，分别有上升、下降请求等-VHDL language to realize the simulation of the four elevators, were rising, declined requests
dcm_test2
- xilinx fpga 倍频的例子，包含整个工程， 如果去用ISE 实现倍频，dcm 用法-xilinx s FPGA dcm example
timeconstraint
- VHDL编程中的时序约束问题，有两个PDF文件，讲的很详细，需要的立刻下载-VHDL programming timing constraints, there are two PDF documents, said very detailed, immediately download the