资源列表
VHDL
- Very low cost, low component count charger/adapter – replaces linear transformer based solutions • Extremely simple circuit configuration designed for high volume, low cost manufacturing-Very low cost, low component count charger/adapter – rep
VerilogXiaYuwenExample
- Verilog数字系统设计教程（夏宇闻著） 例题源程序-Verilog Digital System Design Tutorial (Xia Yu smell) Example source code
spectrum_release_20110901
- Computer ZX-SPECTRUM on FPGA (include T80 & YM2149 module)
LCD_VGA
- VHDL实现VGA同时实现LCD显示相关数据，实现平台XC3S500E-VHDL Implementation VGA LCD display data platform XC3S500E
DE2_NET
- Altera的DE2开发板上的DM9000A网络FPGA接口及其驱动程序,还有 Demo程序
Thsign
- 基于VerilogHDL的MTM总线主模块有限状态机设计The MTM bus on the main module VerilogHDL finite state machine design-The MTM bus on the main module VerilogHDL finite state machine design
JM
- Architecture and the FPGA Prototype for MPEG-2 AudioVideo Decoding
Verilog_ex0
- 基于FPGA实验板的流水灯实验，实验板为DE1-Running water light experiment based on FPGA experimental board
test
- xilinx ise6.3编译环境，verilog控制程序。实现对外部ad转换数据自动采集计算，并发送到DSP最后处理-xilinx ise6.3 build environment, verilog control procedures. To achieve automatic data acquisition external ad converter calculated and sent to final processing DSP
EZ-USB-Examples
- USB2.0 ＋ FPGA开发EZ USB开发=源码-USB2.0+ FPGA development EZ USB Development = source
vip_ex2
- 特权同学开发板上的例程，DDR2控制器集成与读写测试(The routines on the privileged students' development board, DDR2 controller integration and reading and writing tests)
just_clock
- Just a clock made for basys3 in vivado.