资源列表
DDS
- DDS的FPGA实现(VHDL),只可调频，调幅可于外部DA实现。(内附三角波、正弦波、方波的rom调用)-DDS on FPGA (VHDL), only FM, AM can be implemented in an external DA. (With triangular wave, sine wave, square wave rom call)
program
- 1/100s计时器的FPGA实现，本设计的计时器能实现显示最长计时时间为1分59.99秒，且精度大于1/100s，计时器能显示1/100s的时间.-1/100s timer FPGA, the design of the timer to achieve the longest time show time of 1 minutes, 59.99 seconds, and the precision is greater than 1/100s, 1/100s timer can display
key_scan4X4
- 基于ＦＰＧＡ设计的矩阵键盘经过多次测试非常的好用 ＶＨＤＬ语言-FPGA-based design of repeated testing matrix keyboard is very easy to use VHDL language
gas_meter_2lcd
- 段式液晶的Verilog 驱动，效果很好，可以直接例话调用！-Verilog-stage liquid crystal driver, a good effect, so patients can call directly!
VHDLLCD1602
- 这个是VHDL语言编写的LCD1602程序@
modelsim_for_beginner
- 仿真软件modelsim的使用方法，适合初学者使用-Modelsim simulation software to use for beginners
tut_DE2_sdram_vhdl
- This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.
LIP6301CORE_tv_filter
- TV Filter VHDL Souece code
xiyiji
- 描述了洗衣机的工作原理和实现方法，通过vhdl的逻辑描述和行为描述方便简单的实现了此功能-Describes the working principle of washing machine and its realization methods, through the logic of VHDL described and act descr iptions convenience simple realizing the function
Fuzzy_Image
- A IEEE Paper for Noise Removal using Fuzzy is solved partially using VHDL, with my understanding the matlab tool is much easy to implement this but i tried and successfully completed, now i am revealing it partially for understanding-A IEEE Paper for
SASA
- 串口程序，一共有四个模块名，波特率为1，包括接受，发送模块-Serial program, a total of four module name, the baud rate is 1, including the acceptance, sending module
ok--lcd2
- sparten 3e lcd 驱动程序。数据通信线为4个-sparten 3e lcd driver. Data communication lines 4