资源列表
verilog
- 用verilog语言实现ps/2键盘的输入-Ps/2 keyboard input verilog language
addafor
- 实现了Spartan 3e数模转换，采样频率100khz左右，输出为经过量化的4位二进制。-Achieve a Spartan 3e digital to analog conversion, the sampling frequency is about 100khz, the output is quantized four binary.
mulx
- FPGA verilog乘法器 设计 用FPGA中DSP模块实现-FPGA verilog mulx
intel8088
- 实现了intel8088处理器的全部功能，不失为大家学习的好实例。-it realize the processor 8088
24
- 可以实现2-4译码器，并且还有测试模块，可以直接仿真、调试。-2-4 decoder can be achieved, and test modules, direct simulation, debugging.
elivator_control
- 电梯控制器 用于八层楼双电梯的协调调度 可进行扩展
rs232_syscon_latest[1].tar
- RS232 Controller with baudrate generator of 1152-RS232 Controller with baudrate generator of 115200
Sequence_Diagram
- 通过一个简单例子，教会大家如何读懂时序图。很不错的例子。-Through a simple example, to teach you how to read the timing diagram. Very good example.
s_bsp
- ep2c8上跑起来的nios，外部静态sram存储器，简单测试代码-ep2c8 on the run up nios, external static sram memory, a simple test code
1
- 一个适合新手用的VHDL实用教程！！虽然不是很全面，的但是还不错-part1
simpleISA
- 一个模拟ISA界面的简易小程式，简单易懂-ISA interface, a simple simulation of a small program, easy-to-read
FIFO
- 这是关于异步fifo的学习资料，数字系统设计中经常用到fifo模块，了解fifo原理是学会数字系统设计的基础-This is about asynchronous fifo learning materials, digital system design is often used fifo module fifo principle is to learn to understand the basis for the design of digital systems