资源列表
liushuideng
- 这个是eda开发流水灯实验的示范程序，在试验箱上运行成功-This is eda development of light water experimental demonstration program, run successfully in the test chamber
Verilogexamples
- 一本书中的所有Verilog例子 刚开始学习的可以多看看例程 学习编程技巧和风格-Verilog examples
SOPCVer
- ALtium公司设计软件Altium Designer Summer08设计SOPC系统的详细指导教程，以实例的形式讲解了如何通过该软件设计FPGA系统。-ALtium design software company Altium Designer Summer08 detailed guidance system design SOPC tutorial examples to explain how the form of software design through the FPGA s
NiosIIUCOSII
- NIOSii移植uCOSII系统的指导教程，对于初学者，很有指导价值，-NIOSii transplantation uCOSII guidance system tutorial for beginners, useful guidance value,
DDR SDRAM Design Tutorials
- Altera公司的基于NIOSII设计DDR和DDR2内存的资料，很有帮助的，-Based on Altera' s DDR and DDR2 memory NIOSII design information, useful,
NIOSIIEverthing
- ALtera公司的NIOSII的入门资料，对于初学者很有指导意义，欢迎下载。-ALtera entry NIOSII company information very instructive for beginners, are welcome to download.
multiplier
- This file implemented a multiplier in VHDL
traffic_control
- verilog语言实现的交通灯控制程序，能同时对两个方向的交通进行控制-it is a traffic control program that control two way traffic, written in verilog language
key44
- 4x4鍵盤使用語法為VHDL，基於cyclone-4 x 4 keyboard using VHDL
vspi
- 一个用vhdl语言写的spi接口实例，经过altera的fpga测试可以使用。-Written in a language with vhdl spi interface to an instance, after the fpga altera test can be used.
statemachine
- 一个用vhdl语言写的交通灯控制的例子，可以很好的学习vhdl语言中状态机的使用。-Written in a language with vhdl traffic light control case study can be a good vhdl state machine language to use.
PN7_gen_wtb
- 一个用vhdl语言写的产生伪随机数PN7例子，经过altera的fpga测试可以使用。-Written in a language with vhdl generate pseudo-random number PN7 example, after the fpga altera test can be used.