资源列表
VHDLlearn
- 一个介绍vhdl语言的PPT文档，可以快速上手学习vhdl语言。个人觉得初学者可以-A descr iption language vhdl PPT document, you can quickly get started learning vhdl language. Personally feel that beginners can see
uart
- 一个功能很强大的异步串口例子，用vhdl完成，波特率等参数可以调整。-A feature very powerful example of asynchronous serial interface, complete with vhdl, baud rate parameters can be adjusted.
lcd1602
- 基于FPGA的lcd1602的vhdl程序设计-design of lcd1602 based on fpga in the lunguary of vhdl
dds
- dds产生文件源程序，很好用,调用IP核，在ISE中可以使用-dds files generated source code, useful, called IP cores, can be used in the ISE
verilog_exsample
- verilog入门学习代码，保证让你一看就会用VERIOLG-Introduction to learning verilog code, ensure that you will use VERIOLG a look
SafeUSB
- 加法器 將A+B16BITS 相加 請多多利用-adder加法器 將A+B16BITS 相加 請多多利用
Xilinx_Beginners_Book
- XILINX fpga 初学手册。只适合入门-XILINX BEGINNERS BOOK
CRC16_VHDL
- CRC16 VHDL component implements sequential algorithm for incoming data CRC16 calculation
UART_VHDL
- UART VHDL component
dianziqingsheji
- 实现拟想要的音乐，基于at89s51单片机的电子琴设计！-To achieve the desired music to be based at89s51 keyboard microcontroller design!
transfer
- 实现UART的发送功能，采用了状态机来描述其功能。-Achieve UART transmit function, using the state machine to describe its function.
adder
- 完成8位全加器功能，从最底层的半加器到1位全加器在到8位全加器的完整设计-adder