资源列表
FPGA_Verilog_LCD_12864
- 使用Verilog HDL语言编写的驱动LCD12864的时序，可以直接用FPGA/CPLD驱动LCD12864了。-Using Verilog HDL language driver LCD12864 timing, can be directly used FPGA/CPLD driver LCD12864 the.
eslab1
- eslab cua tran trung uit
VHDL-Samples
- VHDL Samples，8-bit calculator controller；vending machine controller with typical vending machine logic ；mplements (most of) the logic required to implement a IEEE 754 multiplier unit.
count6
- 本科课程设计 六进制计数器,带电路原理图，编译已通过。-Undergraduate course design- six decimal counter.Circuit diagram with the compiler has been adopted.
Nios
- 基于Nios多核驾驶疲劳检测系统设计FPGA疲劳检测-fatigue detection system design based on Nios multicore
FPGA TFT 驱动
- 用于 驱动TFT的FPGA代码。该代码是用VHDL编写。(FPGA code for driving TFT.)
LCD_12864
- LCD12864的verilog代码-LCD12864 the verilog code. .
sit
- thsis is document for vlsi nanom electronics which is utilized in reaserch
IC
- IC入门设计，附带图样能让你更好了解IC的设计关键-Introduction to IC design, with drawings make you a better understanding of the key IC design
EMV96
- This emv96 kernel code. It is useful for point of sale programmers.-This is emv96 kernel code. It is useful for point of sale programmers.
target_6
- 通过设计信号延迟的，目标模拟器设计，包括源代码，仿真代码，以及仿真结果图-Through the design of signal delay , the target simulator design , including the source code , simulation code and simulation results in Figure
Quartus7.2_crack
- qutartusII7.2的破解工具。之不过是在6.0的基础上，但是可以用。