资源列表
Matlab-Verilog-Linking
- Matlab Verilog Linking超級完整教學，可以-Matlab Verilog Linking super full of teaching, you can try
FIRAudio
- fı r_audio in verilog
201604plj
- 利用FPGA测试信号的频率，利用内部高速计数器和等精度测量方法，实现对外部信号的精确测频。测量范围10Hz~100M。-FPGA using the frequency of the test signal, and using the internal high-speed counters and other precision measurement method for accurate measurement of the frequency of the external signa
Nexys3_BSB_Support_v_2_4
- xilinx FPGA 15个免费IP Core-xilinx FPGA IP Core
picture_in_picture_demo
- picture in picture information is given in this pdf-picture in picture information is given in this pdf...
DE2_115_Audio
- DE2115音频处理程序，亲测可用的-audio coeder of DE2115
mips_pipelined
- pipelined datapath for MIPS Processor full project
usb_blaster
- 文件列表(日期：2005080604~2009101613)
5
- 进阶实验_06_VGA ：通过VGA显示一个汉字，800X600@72Hz-Advanced experiments _06_VGA: Show a character through VGA, 800X600 @ 72Hz
iic-spi-uart
- 基于FPGA的IIC,SPI,UART接口协议的实现。-FPGA-based IIC, SPI, UART interface protocol implementation.
Music_Player
- 基于Verilog的音乐播放器程序，在Modelsim6.5上仿真通过并可以在开发板上运行-Verilog-based music player program, in Modelsim6.5 through simulation and can be run on the development board
Cyclone4_SD_Card_Audio_Player
- 基于cyclone4 FPGA芯片的音频播放器完成项目工程，包括SOPC项目代码，以及SD卡读取模块Verilog IP，以及完整的Q2下项目工程。-Cyclone4 FPGA chip based audio player to complete the project works, including the SOPC project code, and SD card reader module IP, as well as complete Q2 next project.