资源列表
CH375
- USB1.1 应用文件 采用CH375实现 含有一定的代码-USB1.1 application file contains a certain amount realized by the code CH375
usb20hr_ocp_eval_pack
- 高速usb verilog fpga设计-usb verilog fpga
Verilog
- 比较详细的verilog课件和教程,包括清华的北大的 比较实用-More detailed verilog courseware and tutorials, including Tsinghua University Beijing University of more practical
PCIe_CIVGX_AVST_On_Chip_Mem
- Altera公司的pcie核,附有调试用的驱动和上位机-pcie hard ip of altera, with driver and debug GUI
TFT_LCD
- TFTLCD ILI9325的nios程序 verilog编写可以在板子上运行-TFTLCD ILI9325 the nios verilog program can run on the board to write
XILINX_ML505_REVA_ASSY_110306
- XILINX公司的ML505开发板参考设计源码打包-XILINX
MaxMovie 老干妈
- 演示demo 更清晰更明了 快速便捷 简洁。(The demo demo is clearer and clearer and faster and simpler.)
led
- FPGA做的led流水灯,quartus搭的nios,计时器每隔一秒led点亮一次,四个流水灯循环显示,适合新手学习-FPGA do led light water, quartus ride nios, timer once every second led lights, four light water cycle, for beginners to learn
ep2c5_test
- 该压缩文件是基于FPGA的SOPC系统基本测试程序-The zip file is the basic FPGA-based SOPC system test procedures
SOPC_LED
- 基于Altera公司的Nios软核的LED程序。简单的SOPC例程。-SOPC(System on a Programmbale Chip) application based on the Nios Core which produced by Altera Cor.
RS232
- (6)实验6:串口通讯实验,完整的设计工程文件在RS232文件夹下二、运行环境 程序在以下环境调试通过: (1)Windows XP; (2)Altera公司的Quartus II 8.0 for windows; (3)Altera公司的Nios II 8.0 IDE for windows; (4)Mentor公司的ModelSim SE 6.0;-(6) (2) Altera Corporation Quartus II 8.0 for windows Exp
fpga_balance_project
- 此文件是2009年全国大学生电子设计大赛数字幅频均衡功率放大器的数字部分工程文件,包括modelsim的仿真部分。-This file is the 2009 National Undergraduate Electronic Design Contest figures the number of amplitude-frequency balanced power amplifier part of the project documents, including the modelsim
