资源列表
quartusii10.1_handbook
- altera公司退出的最新quartusii10.0的手册,使用说明。-The latest company to exit quartusii10.0 altera manuals, instructions for use.
quartus@IIyingwenjianjie
- 来自于官方网站的quartus@II英文简介,详细细致地对该软件的操作做了说明,可以作为一手资料保存。-From the official website the quartus @ II English introduction, detailed to the software in meticulous detail operation, and explain as firsthand material can be preserved.
Sender
- 直序扩频通信发送部分的源代码,用verilog编的,包括信源模块、扩频模块、极性变换模块和DDS调制模块-Direct sequence spread spectrum communication sent part of the source code, compiled with verilog source modules, spread spectrum modules, polarity transform module and DDS modulation module
NiosII
- FPGA NiosII 相关例程,Flash方面的和实验的几个例程,学习FPGA NIOSII 感兴趣的赶紧下载吧,编译通过,直接能用。-FPGA NiosII related routines, Flash and experimental aspects of several routines, learning FPGA NIOSII interested in quickly download it, compile, can be used directly.
DE2_115_TV
- 这个设计范例使用 DE2-115 上的 VGA 输出、音频编解码芯片以及 TV 解码芯片( U6)播放 来自 DVD 播放器输出的视频和音频信号。 图 6-1 给出了设计的原理框图。系统主要由两个 模块组成,它们是 I2C_AV_Config 以及 TV_to_VGA 模块。 TV_to_VGA 模块由 ITU-R 656 解 码器, SDRAM 帧缓冲器, YUV422 转 YUV444, YcrCb 转 RGB 以及 VGA 控制器组成。 从 图中还可以看出,设计使用了 TV
vga_verilog
- 在DE1-SOC上运行的verilog HDL代码,可以驱动VGA显示彩条。quartus II 14.0可以直接使用-Verilog HDL code running on DE1-SOC, can drive VGA display color bars. quartus II 14.0 can be used directly
OV7670_TFT
- 针对OV7670视频采集和加水印功能,能够在显示屏上输出摄像头的画面并在画面任意位置添加水印(OV7670 video capture and watermark function)
EP3C8020111219125810_ROM_OK5
- 采用DSP builder v9.1实现正交两路单频输出,已经在EP3C80上面跑通,经实际验证是正确的。此例程非常简洁明了,可以作为DSP builder的入门示例。里面已经包含了生成好的modelsim仿真示例和仿真结果。-Achieved using DSP builder v9.1 orthogonal two single-frequency output, has been run through the EP3C80 above, are proven to be correct.
LCD1602
- 嵌入式FPGA中的nios ii例程。1602显示HELLO_WORLD 代码简单易懂-Embedded in the FPGA nios ii routines. 1602 HELLO_WORLD code that simple and understandable
QPSK_R
- QPSK的FPGA实现,QPSK的调制实现-FPGA implementation of QPSK QPSK modulation to achieve
Verilog_Frequently_Asked_Questions
- 这本书详细的讲解了很多在使用verilog HDL语言开发过程中遇到的问题和困难,以及解决办法,堪称c语言中的c缺陷与陷阱-This book explains in detail many of the problems and difficulties encountered in the development process using Verilog HDL language, as well as solutions, called the defects and traps of
VGA显示贪吃蛇(286116)
- 基于FPGA的贪吃蛇小游戏设计程序源代码和调试方式(FPGA based Snake game design program)