资源列表
CD1_TFT_SSD1963
- FPGA nios TFT ssd1963代码，可以用.-The FPGA nios TFT ssd1963 code, can be used.
Asy_slavefifo_rdwr(141027)
- FPGA 控制CY7C68013A芯片的收发程序，调试通过，最高速度18M-CY7C68013A chip transceiver FPGA control procedures, debugging through, the maximum speed of 18M
chipscope-pro-software-overview
- chipscope.......demo note
DDR2_test_Virtex5
- 针对于Virtex5 FPGA的DDR2读写测试的完整工程，2颗DDR2芯片的数据总线并接为32位，时钟200MHz-A full project for DDR2 test in Virtex5 FPGA board, with 32 bit data bus and 200MHz clock
sobel算法verilog实现
- 使用sobel算法完成了在FPGA平台上对图像的边缘化处理，并且可以将边缘处理的结果通过引脚输出，通过vga接口显示在电脑显示器上。
lpf
- 利用altera的IP核构建的并行数字滤波器，实现100kHZ低通，带外抑制40dB-Altera use IP cores constructed parallel digital filters achieve 100kHZ low pass, band rejection of 40dB
8051corelcd
- fpga上实现的51内核，带有LCD试验，顺利试验成功很好用。-on fpga implementation of 51 core with LCD test, successfully tested well with the smooth.
A2F500_DEV_KIT_Mfg_PF
- ACTEL SmartFusion FPGA在keil下的开发教程-ACTEL SmartFusion FPGA base on keil
BNN-PYNQ-master
- 在PYNQ-Z1上搭建二值神经网络(BNN)(Building two value neural network (BNN) on PYNQ-Z1)
tongxin485
- 关于Verilog语言学习-485通信程序-Verilog on language learning-485 communication program
Avt3S400A_Eval_MB_parallel_flash_v10_1_01
- FPGA 并行NOR FLash的操作相关，很实用的，基于Xilinx SPartan-3 -FPGA parallel operation of NOR FLash related, it is practical, based on the Xilinx SPartan-3