资源列表
GPS
- 基于fpga的gps实现。代码完全可用 基于fpga的gps实现。代码完全可用-Fpga implementation based on the gps. Code fully available
8051_PLJ
- 本设计基于8051IP Core和FPGA技术结合提出一种等精度频率测量方案，解决了传统测频方法测频精度随频率的下降而下降的问题。-The design is based 8051IP Core and FPGA technology combined proposes a precision frequency measurement solutions solve the traditional frequency measurement frequency measurement accu
audio_test
- FPGA WM8731 CODEC 录音放音demo-FPGA WM8731 CODEC record & play demo
Nios_II_I2C
- 本源码为Nios II的开发示例,主要演示Nios II的I2C总线设计。开发环境QuartusII。 本示例十分经典，对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of an example, the main demonstration Nios II I2C-bus design. Development environment QuartusII. This example is very cl
Nios-II-I2C
- 使用开源的IIC MASTER Core，将它加载到NIOSII的AVALON总线上，这样对于NIOSII控制器而言，IIC MASTER就是一个硬件实现的控制器，用户通过调用API函数就能很容易的对IIC进行操作，而且IIC的运行并不占用NIOSII软核宝贵的资源和时间。 -Open source IIC MASTER Core,it is loaded into the AVALON bus NIOSII This NIOSII controller,IIC MASTER is a hard
xapp1022
- xilinx FPGA利用MET平台测试PCIe IP核的说明文档与源文件、-xilinx FPGA platform testing by MET PCIe IP core documentation and source files
NiosII_I2C_bus
- 采用altera公司EP3C系列芯片实现的基于Nios II的I2C总线设计，采用Verilog编码-Altera company EP3C using the Nios II series chip I2C bus-based design using Verilog coding
clock
- 数字钟 用VHDL 编写，内含QUARTUSII软件-digital clock
xapp1014-xilinx-sdi
- xilinx FPGA实现SDI接口输入输出(SDI in/out with xilinx FPGA)
IIC-SOPC
- SOPC系统的I2C代码 直接可用，可作为ＩＰ核用到自己的系统中-SOPC system I2C code directly available, can be used as an IP core in your system
IICbus
- 基于nios ii 控制altera de1 开发板上iic总线实现与at24c02通信-Based on nios ii controlled altera de1 Development Board iic bus for communication with the at24c02
PWM
- 非常详细的PWM硬件语言程序，希望对大家有所帮助-Very detailed PWM hardware language program, we hope to help