资源列表
YCbCr2RGB
- verilog 实现的YCbCr到RGB得转换-verilog implementation YCbCr to RGB was converted
ccmul
- FFT旋转因子，旋转因子是蝶形运算的组成部分，是数字信号处理FFT算法的基础部分-FFT twiddle factor, rotation factor is an integral part of the butterfly, digital signal processing is a fundamental part of FFT algorithm
caideng
- 彩灯闪烁的控制,可以实现彩灯的多种闪烁方式控制-colorful lights’s controllor . It can let the lights work in different ways.
key.c
- 讲述的是FPGA应用中键盘运行的程序，帮助你有效学习开发应用-FPGA application is about to run the program the keyboard to help you develop applications for effective learning
sclock_01
- verilog 秒表，利用视觉暂留，时钟频率-verilog stopwatch
clock-divider
- VHDL code for clock divider circuit. There are two modules: one output divide by 4 and other outputs divide by 6
usb_in
- 基于VHDL的USB读写程序 只供参考哦 -VHDL-based USB reader program
div_f
- --学习分频原理，在LED上面显示出来。一亮一暗 --利用计数器分频，把50MHZ的频率变的更慢。我们眼睛可以分辨的出来。 --输出是1Hz-- Learning divider principle, above the LED display.- The use of counter divider light up a dark 50MHZ frequency becomes slower. Our eyes can distinguish.- Output is 1Hz
keshe
- 低通滤波器，基于eda使用vhdl语言实现数字滤波的功能-Low-pass filter, based on the the EDA use VHDL language digital filtering function
bakema
- 产生巴克马发生器 通过计数来决定输出 具有复位功能-Bake Ma produced by counting to determine the output of the generator has a reset function
carrylukahead
- carry save and carry luk ahead adder vhdl
mul_addtree
- 8位加法树乘法器Addition tree multiplier-Addition tree multiplier of 8bits