资源列表
signal
- 控制时序灯亮，在时间上升沿使得灯有选择亮-Control the timing lights at the time of making the rising edge of bright lights have a choice
Dcufaqi
- hdlthis is a FPGA and cpld good this a FPGA and cpld good-this is a FPGA and cpld goodthis is a FPGA and cpld goodthis is a FPGA and cpld good this is a FPGA and cpld good this is a FPGA and cpld good
seg7
- 四位七段数码管扫描显示电路,采用50mhz频率输入，分频成扫描频率，然后显示四个数字-Four seven-segment LED display scanning circuit, the use of 50mhz frequency input frequency into the scan frequency, and then display four digits
dds
- 这是个基于dds的正弦波发生器的程序，用vhdl语言编写， 希望对大家有用。 -This is a sine wave generator based on dds program, using vhdl language, want to be useful.
optic_tx_top
- 。 8bit的代码组合包含256个数据字符编码和12个控制字符编码， 分别记为Dx. y和Kx.y。 通过仔细选择编码方法可以获得不同的优化特性
LED_V1.0.0
- LED控制 灯光渐变控制功能 灯光渐变控制功能-Light gradient control function Light gradient control function
DC_Removal
- DC removal vhdl code
ROM_controller
- rom controller source code verilog
BCD-youxianbianma
- 优先编码器，通过VHDL语言实现BCD优先编码的功能-Priority encoder BCD priority encoder function through VHDL language
cadideng2.v
- 循环左右移动，可控8位彩灯控制器，可根据时钟信号进行自动响应-Circulation and move around, controllable 8 lantern controller, according to the clock signal automatic response
cordic
- cordic算法，适用于宽带信道化接收机提取信号参数-CORDIC algorithm, suitable for wideband channelized receiver signal parameter estimation
Clock_div
- 偶数分频及50占空比输出，很详细，适合初学者-Even frequency division and duty cycle of the output 50, in great detail, suitable for beginners