资源列表
eda_shiyanbaogao
- eda实验报告，包括全加器、四选一数据选择器、交通灯。-eda lab reports, including full-adder, four elected a data selector, traffic lights.
i2c
- uboot i2c driver code for arm a5 dual core cpu imapx820, which is an soc of infotmic.
aes_core.tar
- AES的Verilog实现,用于加密的算法硬件实现!
Verilog
- virtex-5 库声明代码 verilog版本 包含完整的原语实例化代码-virtex-5 library declaration code verilog version contains the complete primitive instantiation code
HDLC
- verilog HDL语言编写的HDLC协议的IP核，包括通讯控制及CRC。-written in verilog HDL HDLC protocol IP core, including communications control and CRC.
whitenoise
- 信噪比可变的加性高斯白噪声信道下信号发生器的VHDL语言编程实现-the realization of data-creater on AWGN channel
38decoder
- 使用Verilog硬件描述语言编程的38译码器，包含测试描述
wujian7
- N=7基带信号发生器EWB实现,N=7基带信号发生器EWB实现-N = 7 base-band signal generator EWB realize, N = 7 base-band signal generator to achieve EWB
debouncer_vhdl
- debouncer in vhdl with clock devider parameter and number of inputs
Privite_rom_32_20160519
- xilinxＦＰＧＡROM32*1原语的使用，vivado工程，含有仿真测试文件Testbench,添加地址寄存器，能够按址寻找你所存储的数据，仿真一目了然，对初学者甚好,verilog语言实现该功能。-xilinxFPGAROM32* 1 primitive use, vivado engineering, simulation test file containing Testbench, add an address register, Anzhi can find the data yo
stratix-10-mx-product-table
- stratix 10 mx product table
03my_mux
- 器件EP4CE6F22C8N2选一数据选择器(Choose device EP4CE6F22C8N2 data selector)