资源列表
BusMultiplexer
- 基于DSP48E1的BUS MULTIPLEXER-Based on the BUS MULTIPLEXER DSP48E1
rx_tx_module
- RS232串口通讯在的FPGA应用的v原代码-The v original code of the RS232 serial port communication in FPGA applications
cpu_eightbit
- vhdl implementation of an eight bit cpu
QAM-Mod
- QAM Modulator verilog code
multiplier
- 交通灯程序《数字电路EDA入门－VHDL程序实例》---交通灯程序例子,,C-C++
CRC-Verilog
- 此是进行循环冗余效验的Verilog编码，适合多种标准，如CRC16-this Cyclic Redundancy is well-tested Verilog code for a variety of criteria, such as CYXLIC REDUNDANCY
c432
- verilog coding for 36 bit interrupt controller
wavefetch
- ModelSim的波形比较的功能可以将当前仿真与一个参考数据（WLF文件）进行比较，比较的结果可以在波形窗口或者列表窗口中查看，也可以将比较的结果生成一个文本文件-ModelSim waveform can be compared to the current functional simulation with a reference (WLF paper ), the results can be compared in the waveform window or window List
modeling_memory
- HDL source code for clocking excercise
Verilog_UART
- the file use verilog HDL to realize uart.it contain recive and transmit.-the files use verilog HDL to realize uart.it contain reciver and transmitor.
test_tb
- good VHDL example , it is good work and complete project
TLC7524-interface-circuit-program
- 使用VHDL语言，编写的TLC7524接口电路程序，-Using VHDL language, interface circuit TLC7524 written procedures,