资源列表
Evita_Verilog
- Verilog Tutorial Verilog Tutorial -Verilog Tutorial Verilog Tutorial Verilog Tutorial Verilog Tutorial
DataCap_XKL_sw_0309_UCGUI_fine
- 使用xilinx提供的xilkernel系统，五个任务，使用了信号灯和消息队列， 包含ucGUI,增加了自定义键盘和液晶屏的支持。-Using xilinx provides xilkernel system, including ucGUI, an increase of custom keyboard and LCD screen support.
test_uart
- 基于fpga的uart串口通信协议，64位数据(Uart communication protocol based on fpga, 64-bit data)
ROM
- 使用Verilog语言编写的ROM，根据ROM逻辑，自己写的一个ROM，并仿真实现功能-read only memory
VHDL-Circuit-design
- 本教程旨在VHDL语言编写程序提供基础性知识，辅助完成简单硬件程序设计 主要内容为：VHDL基本描述语句-This tutorial is designed VHDL language program to provide basic knowledge, secondary to complete a simple hardware programming The main contents are: the VHDL basic descr iption of the stateme
uart_ram
- 串口接收数据校样后存入双口ram,接收完整帧数据后，置中断，通知串口发送-After receiving proof serial data stored in dual port ram, receive a complete frame of data after the interrupt, serial port to send notifications
pulse_width
- 用verilog编写的，通过对时钟脉冲计数来记录脉冲宽度-measure pulse width
width
- 用verilog编写的，通过对时钟脉冲计数来记录脉冲宽度-measure pulse width
shft_reg
- 移位寄存器的VHDL语言实现，quartus 和 modelsim 仿真-Shift register VHDL language quartus and modelsim simulation
SDRAM-controler-based-on-the-FPGA
- 本例是用FPGA器件实现SDRAM操作，所用语言为verilog硬件描述语言，希望可以对学习FPGA的人起到帮助作用-In this case is to achieve SDRAM operating with FPGA devices, and use of language verilog hardware descr iption language, I hope people can learn to play FPGA helpful
USB_fpga
- FPGA与USB PHY芯片Cy7c68013A通信的程序，Verilog语言-FPGA and USB PHY chip Cy7c68013A communication procedures, Verilog language
Verilog_HDL_digital_design_2nd_Ver
- Verilog_HDL数字设计与综合（第二版）-Verilog_HDL Digital Design and Synthesis (Second Edition)