资源列表
c18_divider.rar
- 精通verilog HDL语言编程源码之4--常用除法器设计,Proficient in language programming verilog HDL source of 4- Common divider design
c22_FIFO.rar
- 精通verilog HDL语言编程源码之8——异步FIFO设计,Proficient in language programming verilog HDL source of 8- Asynchronous FIFO Design
SPI_AT45DB041B.rar
- 用verilog编写的SPI程序,SPI芯片是AT45DB041B.文件内包含程序仿真时的截图.包括read和wirte.,SPI prepared using Verilog procedures, SPI chip AT45DB041B. Document contains procedures for simulation screenshot. Including read and wirte.
T2_USB_IN.rar
- usb芯片cy7c68013从fpga中读入数据的演示程序，verilog语言,CY7C68013 chip usb read from the FPGA into the data presentation process, verilog language
Spartan3E.rar
- Spartan3E的LCD字符滚动显示源程序，具体内容见注释,Scroll Spartan3E character LCD display the source code, see the specific contents of the Notes
stopwatch.rar
- 秒表可计时，用VHDL编译的源代码，从0.1到60秒计时，解压后直接用Quartus打开project即可,Stopwatch timer can be used to compile the VHDL source code, from 0.1 to 60 seconds from time, after extracting the direct use of Quartus can open the project
cpuyuanma1.rar
- 说明：cpuyuanma1是硬布线控制器源代码， cpuyuanma2是微程序控制器源代码。,Descr iption: cpuyuanma1 hard wiring the controller source code, cpuyuanma2 micro-program controller source code.
(fpga)sdram.rar
- verilog 代码，读写SDRAM 不带仿真，需要自己编写测试文件,Verilog code, read and write SDRAM simulation without the need to prepare their own test documentation
avalon_pwm.rar
- FPGA的avalon总线的接口 pwm测试程序,err
Mars-SP3-U_SCH.rar
- 一块XC3S400 FPGA电路板的原理图，板子上有CY7C68013A作为USB接口,A XC3S400 FPGA circuit board schematics, board have CY7C68013A as USB interface
CPU_16.rar
- vhdl语言的16b cpu代码 全部的代码我会依次上传 另有说明txt文本,VHDL language 16b cpu code all the code I will upload the text otherwise stated txt
signal.rar
- 用VHDL语言写的信号发生器,很不错的应用,VHDL language used to write the signal generator, a very good application