资源列表
SPI in verilog HDL
- SPI in verilog HDL
spi_latest[1].tar
- serial peripheral interface master interface Wishbone compatible
EP2C20_ALTERA_3462031
- altera的器件手册，型号为ep2c20，希望对大家有用
16-bit-parallel-mult
- 16位并行乘法器， 由四个4位乘法器组成-16-bit parallel multiplier, consisting of four four multipliers
FPGA-VGA
- 最全的FPGA-VGA方面的资料及源码,对于初学者来说非常有帮助 -failed to translate
how_to_use_Libero8
- 是libero的使用说明，如果想使用actelfpga的libero软件可以试试它。-the reference of actel fpga soft Libero8.5, and it s good tool for new learner.
XILINX_LABZ
- Xilinx labs which help in creating VHDL files for beginners.
msp430f5529_accelerater
- msp430f5529开发板的加速度计实验程序，可以实验加速度计，里面编写了两个简单的使用加速度计的小游戏-msp430f5529 development board accelerometer experimental procedure can experiment accelerometer, which prepared two simple little game using accelerometer
AD9850
- AD9850 DDS芯片ARM控制处理器代码-DDS chip AD9850 ARM controller code
DDS_sin
- 这是一个用Verilog编写的以实现DDS功能的程序，包含了正弦、方波、锯齿波。-This is a Verilog written procedures to implement DDS functions, including sine, square wave, sawtooth.
design-of-CAN-based-on-VHDL
- 基于Verilog+HDL设计CAN控制器,详细介绍各功能模块的设计。本论文的重点是CAN总线通信控制器的前端设计。即用Verilog HDL语言完成CAN协议的数据链路层的RTL级设计，实现其功能，并且能够在FPGA开发平台Quartos上通过仿真验证，证明其正确性-Verilog+ HDL-based design of CAN controller, detailed design of each functional module. This paper focuses on the C
elevator
- 两部3层电梯最基本功能源代码，含电梯运行情况判断和led显示-Two 3-story elevator basic function source code, including lift operation to determine and led display