资源列表
test_uart
- 该资料包含用FPGA(EP4CE22F17型号)编写的UART通信程序,最重要的是里面含有串口波特率可调,包括一些常见的波特率。(This information includes UART communication program written by FPGA (EP4CE22F17 model), and most importantly, it contains serial port baud rate tunable, including some common baud rate
receive_nrf24l01
- 该资料包含用verilog实现的NRF24l01无线芯片接收数据功能,在EP4CE22F17芯片上实现。(The data includes the function of receiving data from the NRF24l01 wireless chip implemented by Verilog and implemented on the EP4CE22F17 chip.)
FPGA与SOPC设计教程:DE2实践
- DE2开发经典书籍,FPGA与SOPC设计教程:DE2实践。(classical tutorial for DE2 development.)
fifo
- IL SAGIT D'UN FIFO EN DEscr iptION DE LANGUAGE vhdl
RCA.tar
- A ripple carry adder.
CSA.tar
- A Carry Select Adder.
运动员反应时间测量
- 测量运动员反应时间,时间不能小于200ms,否则会发出警报(Measurement of athletes' reaction time)
serial
- FPGA实现232通讯,用verilog语言(RS232 communication design in FPGA with verilog)
pid_controler
- 在FPGA内部利用VHDL硬件描述语言实现经典的PID控制算法(PID algorithm in PFGA)
信号分析与处理——MATLAB语.part1
- ① Verilog的抽象级别 ② Verilog的模块化设计 ③ 如何给端口选择正确的数据类型 ④ Verilog语言中latch的产生 ⑤ 组合逻辑反馈环 ⑥ 阻塞赋值与非阻塞赋值的不同 ⑦ FPGA的灵魂状态机 ⑧ 代码风格的重要性((1) the abstract level of Verilog The modular design of Verilog How to select the correct data type for the
cy7c443
- 存储器仿真模型,建立testBench,可对cyc443存储器进行功能仿真。(TestBench memory, can establish simulation model, function simulation of cyc443 memory.)
SNAKE
- 基本的verilog贪吃蛇项目(微机原理课程设计)(The basic Verilog snake program (Microcomputer Principle Course Design))
