资源列表
one-add-two
- 半加器的设计代码，和引脚的普通设置，有很多的功能有待研究！-succeful is good
mux21
- 二选一选择器，这个程序已很好的运行成功，望大家观赏！谢谢 -two choose one
transmit
- 基于ALTERA EP2C8的多通道窄脉冲产生VHDL代码，能够实现窄脉冲驱动信号。-ALTERA EP2C8-based multi-channel narrow pulse generated VHDL code can narrow pulse drive signal.
FDK
- LCD1602控制VHDL代码，带有ADC和DAC采样，以及原理图和PCB版图供参考-LCD1602 control VHDL code, with ADC and DAC sampling, as well as schematic and PCB layout for reference
taxi-price-evaluator_VHDL
- 基于VHDL的出租车计价器，具有计时和路程计算功能，VHDL重在实践-VHDL-based taxi meter, timing and distance calculation function, VHDL is Practice
demo5-charlcd1
- 字符液晶实验,字符液晶上进行显示字符。字符液晶实验,字符液晶上进行显示字符。-Character LCD experiment, character LCD display character. Character LCD experiment, character LCD display character.
my_iic
- verilog fpga与eeprom 的iic通信-the iic communication of verilog fpga eeprom
16QAM-VHDL
- VHDL语言实现的16QAM代码 编译成功-16QAM code written by VHDL, the complilation is successful
car
- 包含VHDL代码，基于FPGA，实现智能车循迹。-Contains the VHDL code, based on FPGA, intelligent vehicle tracking.
FDMA
- 实现FDMA的仿真，3路输入信号，FFT输出-FDMA simulation input signal, FFT output
dualport
- dual port sram test programe-sram test
float
- 基于Verilog HDL的32位浮点运算加法器的源代码。-Based on the 32-bit floating point adder in Verilog HDL source code.