资源列表
HowtodownloadALTERAFPGA
- 文章介绍了怎么下载ALTERA FGPA 和FPGA可能出现的问题和解决方法-Article describes how to download the FPGA ALTERA FGPA and the possible problems and solutions
My_Nios_2
- nios的一个最小系统实现，非常有参考价值！-A minimum nios system implementation, very has reference value!
POC
- 用VHDL语言设计的poc （并行输出控制器） 用法：中断模式 和 查询模式-Using VHDL language design poc (parallel output controller) Usage: interrupt mode and query mode
VHDLSaler
- 文件名：pl_auto1.vhd。 --功能：货物信息存储，进程控制，硬币处理，余额计算，显示等功能。 --说明：显示的钱数coin的 以5角为单位。-library ieee use ieee.std_logic_arith.all use ieee.std_logic_1164.all use ieee.std_logic_unsigned.all entity PL_auto1 is port ( clk:in std_logic
EP2C8_EP2C8A
- Cyclone II Device Family Data Sheet
BCDEncoder8421BCD
- BCD编码器的设计(8421BCD)，一个很实用的模块-BCD Encoder (8421BCD), a very practical module
ISE9_1
- LILIXN赛灵斯自带的ISE使用说明书。还不错哈。-the introduction ISE for lilinx.
Altera_FPGA_develop(QuartusII_7.2_ModelSim_6.5).ra
- Altera FPGA开发说明（QuartusII 7.2 & ModelSim 6.5）.pdf 建立和编译QII项目 modelsim功能仿真 QII引脚分配 modelsim时序仿真（建立Altera仿真库） QII下载 -Altera FPGA Development Descr iption (QuartusII 7.2 & ModelSim 6.5). Pdf project to establish and build QII QII pin ass
alu
- this is source code in verilog for arithmatic logic unit for RISC cpu
sequencecontroller
- this is source code in verilog for sequence controller and clock generator which is used in RISC cpu
I2C_CONTROLLER
- this is VHDL model of I2C_controller
bpsk_fpga
- 在FPGA上实现BPSK信号的解调，全部用VHDL语言编写，非常实用。-Implemented on the FPGA BPSK signal demodulation, all with the VHDL language, very useful.