资源列表
sdram_control
- 基于硬件语言Verilog的一个sdram控制器的设计以及仿真-Verilog language, a hardware-based controller design and simulation sdram
AVD
- 现代的IC芯片包含丰富的触发器，不同电路的时钟驱动源存在频率和相位的差异，因而出现了跨不同时钟区域进行异步数据传输的要求。亚稳态问题是异步数据传输过程面临的主要问题，本文提出多种跨越异步时钟边界传输数据的方法，它们包括FIFO法和脉冲展宽处理等同步方法。 -Modern IC chip contains a wealth of trigger, the clock drive source different circuit exists between the frequency and ph
miaobiao
- vhdl实现秒表，功能包括计时、冻结时间显示、暂停-vhdl implementation stopwatch functions, including time, freezing time display, pause
FPGA_system_design
- FPGA最小系统设计教程，内容全面-Minimum System FPGA design tutorials, comprehensive
vhdl2
- vhdl设计实例二：测试向量级波形产生，状态机实例-vhdl Design Example Two: Testing the order of waveform generation, the state machine instance
VHDL_100
- VHDL语言100例，内容很全，有电路级，行为机的设计实例-VHDL, 100 cases, the content is very wide, a circuit level, the behavior machine design example
licznik8bit
- 8 bit counter created in vhdl as a program to complete one of my study case.
LIP1401CORE_IO_LVDS
- IO LVDS VHDL & Verilog code
LIP1721CORE_system_fuse
- System fuse verilog code
LIP1501CORE_dbg_interface
- Verilog Debug interface code
mcsdte
- FPGA嵌入式项目实战，曼彻斯特编码器与译码器-FPGA embedded project combat, Manchester encoder and decoder
6345252
- FPGA应用实例，FPGA片上硬件乘法器的使用，编程语言vhdl-Application FPGA, FPGA-chip hardware multiplier to use, programming language vhdl