资源列表
FIFO
- 同步和异步FIFO，VHDL实现。希望对大家有所帮助。-Synchronous and asynchronous FIFO, VHDL implementation. We want to help.
mutiplier_4bits
- 通过移位相加，实现两个数的相乘。通过一个内部寄存器存储得到的积。--- it multiplies a 5_bit multiplicand by a 5_bit multiplier to give -- an 8_bit product -- -- aim: to master the method of mutiplier "shift and add to realize the mutiplier" --
nios_net716UDP_nic
- 在Altera nios上用rtl8019实现UDP通信-altera nios rtl8019 udp
block-and-nonblock
- 对于可综合风格、阻塞和非阻塞的详细讲解，教学用ppt。-A ppt about integrated style, blocking and nonblocking details, for teaching.
VDHL
- VHDL 详细教程。 内包含VHDL语法。 值得收藏学习！-VHDL detailed tutorial. Contains VHDL syntax. Collection worth learning!
Firefly_MV_USB_Gettin_Started_Manual
- Firefly MV USB Getting Started Manual 的相关介绍- some introduction about Firefly MV USB Getting Started Manual
FPGA
- 华清远见的《FPGA应用开发入门与典型应用》，是超星版本的，里面对FPGA的设计由浅入深，值得一看。-China Qingyuan, see the " FPGA Application Development and Typical Applications" , is the Superstar version, the inside of the FPGA design Deep and worth a visit.
Serial12
- 串口收发数据，包含并转串和串转并程序，可验证一些小程序-Send and receive serial data string and the string contains and transfer switch and procedures
my_lcd3
- 液晶显示1602，可以改变显示的位置和闪烁方式-Liquid crystal display 1602, can change the display location and flashing mode
319
- 简单的手表程序，实现调节时间，及手表正常运行-Simple watch program, it adjusts the time, and watch the normal operation
Verilog_HDL_digital_design_2nd_Ver
- Verilog_HDL数字设计与综合（第二版）-Verilog_HDL Digital Design and Synthesis (Second Edition)
dianzizhong
- 该代码是用VHDL编写的电子时钟，可以实现调时调分，7段码显示，在Xilinx的Spartan3E上下载测试过，压缩文件中包含了整个工程，并有管脚分配文件，非常适合VHDL的初学者，比如一些基本的按键，去抖，闪烁写法。-The VHDL code is written using the electronic clock adjustment can be achieved when the transfer points, 7 code shown to download the Xilinx