资源列表
cf5_0
- 标准niosii，具有CF接口，可以读写CF卡，已经测试过可以使用-Standard niosii, a CF interface, CF card can read and write, has been tested using
ebiu_ctl
- VHDL语言编写的外总线控制器，带有aes加密模块-VHDL language external bus controller, with aes encryption module
Post_simulation_based_QuartusII_ModelSimSE(Verilog
- 详细的讲解了怎样利用modelsim进行后仿真，对初学者很有帮助。-In detail how to use modelsim post-simulation, helpful for beginners.
MIPS_UNI_v0
- verilog mips unicycle
USB4716ARMCE
- 数据采集模块USB4716 的ARM驱动程序可直接安装在wince系统中-qudongsofeware
shift_light
- 流水灯可以左移右移，可改变代码来改变频率-Water light can be shifted to right or left ,we can verify the code to change the frequency
locatQR2d
- 二维条码处理。一些代码，不是很全，仅供参考-something of 2dbarcode
m
- 由20位移位寄存器线性反馈产生的m序列的vhdl代码-20-bit shift register linear feedback sequence generated vhdl code m
c_bchange
- 实现数据的串行转并行运算，并连续转换，每转换16个数据后，发出一个使能信号-Serial transfer of data parallel computing, and continuous change, each of 16 data conversion, issue an enable signal
slice
- A technique for constructing a processor from modules,each of which processes one bit-field or “slice” of an operand.Bit slice processors usually consist of an ALU of 1,2,4 or 8-bits and control lines including carry or overflow signals usually inter
trafficlight
- design and simulate the traffic light controller-design and simulate the traffic light controller
aludesign
- In computing, an arithmetic logic unit (ALU) is a digital circuit that performs arithmatic and logical operations. The ALU is a fundamental building block of the central processing unit of a computer, and even the simplest microprocessors contain one