资源列表
traffic
- 具有数码管显示的交通灯源程序 其中有四个状态 （使用的是clone芯片）-With digital pipe display of traffic light source program including four state (use clone chip)
PD_using_FPGA
- verilog编写基于fpga的鉴相器模块
sincos
- 主要是sincos函数的实现，编译软件为Quters II，语言为VerilogHDL语言。-Sincos is the realization of the main function
PWM-waveform
- 用Altera Quartus II 的VHDL语言完成的PWM波形产生的源代码-Altera Quartus II VHDL with the completion of the PWM waveform generation language source code
PowerForwardUG
- low power user guide for NCverilog-low power user guide for Incisive ncsim, describe the Common Power Format uasge
VHDL
- VHDL系统设计实例源程序集 VHDL系统设计实例源程序集-VHDL Design Example Design Example VHDL source set source set
simple_pic
- 一个通用中断系统的Verilog HDL描述，对想了解知道是怎么实现的读者，可以查看综合出来的电路，会有很大帮助！-A common interrupt system of the Verilog HDL descr iption of the would like to know how to achieve the readers know, there will be of great help!
Serial
- 本文档里面的程序是用verilog编写的串口程序，里面有详细的说明及其运行结果图。-The document which the program is written in serial verilog program, which is described in detail and the results chart.
modelsim
- 这是一个适合初学者学习的好文档 -a pdf
秒表
- 基于VHDL语言实现秒表的计时、倒计时的功能。(The function of timing and countdown of the stopwatch based on VHDL language.)
n_led_ctl
- 多个LED灯控制，,自己在Spartan-3e板上测试用的-Multiple LED light control, its in the Spartan-3e-board testing of
pn127
- 这是个128位的串行伪随机码发生器，还可以进一步扩充-128 This is a serial pseudo-random code generator, can be further expanded