资源列表
100-FPGA-question_Introduction
- FPGA经典100问之《入门与提高5问》。介绍了FPGA入门时的许多注意事项，对FPGA的快速入门很有帮助，初学者必备！-FPGA 100 and asked the classic " entry and improve 5 ask." It introduces many considerations when FPGA starter on quickstart helpful FPGA, beginner necessary!
Experiment03
- VERILOG 下 的 摁键 驱动 基于 黑金 开发板-The VERILOG under the pressed key driver development board based on black gold
fmq
- 主要是基于DE2开发板，使蜂鸣器发出警报声，和一些相关资料，具有一定的学习价值。-Mainly based DE2 development board, the buzzer sounds an alarm, and some information, some learning value.
clock
- 用VHDL实现多功能数字钟 闹铃 计时 动显 报时等-VHDL realization of multi-functional digital clock with alarm timer was timekeeping and other fixed
VEDA7LED
- 采用QUARTUS II 7.2 (32-BIT)工具实现的两位7段数码管动态扫描显示的VHDL程序。硬件电路采用8位拨位开关控制，高四位控制左数码管，第四位控制右数码管。芯片采用EP1C6T144FPGA器件。-By QUARTUS II 7.2 (32-BIT) tools to achieve the two 7-segment digital tube dynamic scan showed the VHDL program. 8-bit hardware with dial-bit s
DIV_oddN
- Quartus开发环境下，通用小数分频器的设计，满足各种需求。-Quartus development environment, the design of the universal fractional divider, to meet various needs.
ps2verilog
- 基于fpga的verilog写的PS/2键盘解码实验-Based on fpga verilog write the PS/2 keyboard decoding experiments
FPGA控制的红外循迹小车
- FPGA控制的红外循迹小车八个传感器利用PWM进行控制转弯和前进后退可以自启动
vhdlcoder
- VDHL的简单DEMO演示，有利于初学者学习使用
buzzer
- 用Verilog HDL写得能给蜂鸣器输出‘哆、唻、米、发、嗦、啦、稀、哆（高音）’声调的程序-Buzzer to give written using Verilog HDL output ' duo, Lai ... ...' tone of the program
mc8051_design
- MC8051 IP core.由Oregano Systems提供。初学者可以学习一下。-MC805 1IP CORE,provided by Oregano Systems.It s helpful for beginners.
ex9_ps2
- 该文档为特权同学EMP240开发板上面的键盘操作，能够进行ps2键盘的操作，验证正常，源码和相关资料；-The documentation for the privileged students EMP240 development board above the keyboard operation, able to perform the ps2 keyboard operation, validation is normal, source code and related informa