资源列表
2-fsk
- 2-fsk调制解调的fpga实现。two-fsk为调制程序，fsk-two为解调程序。-2-fsk modulation and demodulation of fpga implementation. two-fsk for the modulation process, fsk-two for the demodulation process.
2-ask
- 2-ASK调制解调的FPGA实现。ASK-TWO为调制程序，two-ASK为解调程序。-2-ASK modulation and demodulation of the FPGA. ASK-TWO for the modulation process, two-ASK for the demodulation process.
chapter7
- VHDL 四位加法器 利用quartus II开发四位加法器，-VHDL comptur comparator_4
AlteraFPGA
- AlteraFPGA_CPLD设计基础篇，值得一看-AlteraFPGA_CPLD Design Basics, worth a visit
ROM
- 用于rom的存入地址，尽可能地增加稳定性-Rom the stored address for as much as possible to increase stability
DE2_SD_Card_Audio
- 在DE2实现SD卡音乐播放器 编写语言verilog-In the DE2 SD Card music player to achieve the preparation of language verilog
Mars_EP1C3_S_Core_V2.0
- 此包中为Mars_EP1C3_S_Core_V2.0 FPGA学习板中的接口实验代码.共包括10个实验源代码:7段数码管,i2c,KEYSCAN,MCU,PS2,UART,VGA，蜂鸣器，跑马灯和拨码开关. -This learning package for Mars_EP1C3_S_Core_V2.0 FPGA board interface test code. A total of 10 experiments, including source code: 7 segment di
count
- 一种计数器的FPGA的verilog源程序和仿真图谱-A kind of counter verilog source code and simulation of FPGA-map
GrayCode
- 格雷码，Gray Code,，是一种绝对编码方式，典型格雷码是一种具有反射特性和循环特性的单步自补码，它的循环、单步特性消除了随机取数时出现重大误差的可能，它的反射、自补特性使得求反非常方便。-Gray Code, Gray Code,, is an absolute encoding, the typical Gray code is a kind of reflection characteristics and cycle characteristics of the single-ste
10scounter
- 10秒计数器的源代码，用于VHDL的仿真过程-10 seconds counter of the source code for VHDL simulation process
Verilog
- 各类verilog源代码 计数器，全加器，串行快等。-All verilog source code counter, adder, serial quick.
verilogPPT
- 本书为北大微电子系Verilog课件，供初学者参考，内容齐全，网上很难找到的哦！-Book for the Department of Microelectronics, Peking University Verilog courseware for advanced users, the content is complete, the Internet is difficult to find the Oh!