资源列表
synthesizable_Verilog_syntax_and_semantics
- 《可综合的Verilog语法》国外著名大学老师编写，对于理解verilog HDL文件的可综合与不可综合会有帮助。-synthesizable Verilog syntax and semantics,by teachers from university of Cambridge,It is userful for verilog HDL design.
FPGA_ImageProcessing
- Implementation of Image Processing Algorithms in FPGA Hardware.
modelsim_project_example.tar
- there are exemple in the vhdl
EDA_BOOK
- 潘松编写的EDA书籍！学习FPGA的好帮手！-Pinson prepared by the EDA books! Learning FPGA a good helper!
uart_vhdl
- 是使用VHDL语言编写的基于FPGA的uart的源代码！-VHDL language is to use FPGA-based uart source code!
JDL12864LCD
- 基于Actel A3P030 FPGA，液晶采用JDL12864串行接口，时钟48MHz-Based on Actel A3P030 FPGA, LCD using JDL12864 serial interface, clock 48MHz
ALTERA_MF_COMPONENTS
- VHDL的基本程序，可以用来驱动键盘，功能强大，虽然和基础-VHDL
AD0809
- verilog实现的“状态机实现AD0809数模转换”。-verilog to achieve a " state machine to achieve AD0809 digital to analog conversion."
cnt6
- verilog实现的“六进制约翰逊计数器”。-verilog implementation of the " six hexadecimal Johnson counters."
modelsimtutorial
- modelsim教程仅供学习-modelsim tutorial to learn only
sn7448
- verilog实现的“BCD/七段译码器”。-verilog implementation " BCD/Seven-Segment Decoder."
shanshuoliushui
- verilog实现闪烁灯和流水灯dechengxu-verilog liushuideng shanshuodeng chengxu