资源列表
standard_sim_tb
- xilinx CTC IPcore(encoder 和 decoder）的标准测试，未经信道加噪-the standard test of xilinx CTC IPcore (encoder and decoder) , without the channel with noise
DES
- This is verilog source code for DES(Data Encryption standard) which is used in network security.
PC8501
- 本程序为Verlog语言程序，采用QUARTUS6.0编写，程序实现的功能是控制AD2S80的转换和和数据总线上数据的读取-This program is Verlog language program, using QUARTUS6.0 preparation, program implementation function is to control the conversion and AD2S80 and data bus to read data
shuzizhong2008
- 这时一个关于数字钟的VHDL程序，有计时、校时、报时等功能-When a digital clock on the VHDL program, there is time, school time, timer and other functions
958610VHDL_trafficlight
- 这时一个关于交通灯的VHDL语言编写的程序，适合于EDA设计之中。-When a traffic light on the VHDL language programs, suitable for EDA design.
jiaotongdengsheji
- 这是一个交通灯控制的VHDL程序，用于maxplus平台，适合于EDA设计-This is a traffic light control, VHDL program for maxplus platform, suitable for EDA Design
shuizhongvhdl
- 这时一个数字钟的VHDL程序，有计时、校时、整点报时功能，很适合做EDA设计之用-When a digital clock in VHDL procedures, time, school hours, the whole point timekeeping function, it is suitable for use in EDA Design
mc8051
- Oregano Systems 8051 ip核-Oregano Systems 8051 ip core
audio_codec
- i2s协议时飞利浦公司专门为开发音频而开发的协议，这是它的VHDL代码，希望有帮助-i2s agreement, Philips developed specifically for the development of the audio protocol, which is its VHDL code, and want to help
APB_I2S
- 这是一个中文版的i2S总线，对搞硬件的朋友会有帮助的-This is a Chinese version of the i2S bus, friends are engaged in the hardware would be helpful
shuzizhong
- 这时用VHDL语言编写的多功能数字钟，具有正常的计时功能，还能进行校时、校分，并且具有整点报时功能-Then with the VHDL language multi-functional digital clock, with the normal timing functions, but also to the school, the school hours, and have the whole point timekeeping function of
fulladder
- 本代码实现了全加器的功能，可供初学者学习-This code implements a full adder functions, for beginners to learn