资源列表
LCD
- 利用FPGA和硬件描述语言来控制字符型液晶显示器的读写-The use of FPGA and hardware descr iption language to control the read and write character LCD display
fpga_led
- 基于ep1c6的led控制器显示程序，已经在开发板上试验成功-Ep1c6 controller based on the led display program has been successfully tested in the development of on-board
58
- 5/8分频器，实现分频功能，受外部周期信号激励的震荡，其频率恰为激励信号频率的纯分数，都叫做分频。-5/8frequency demultiplier
s3esk_picoblaze_real_time_clock
- PicoBlaze_Real_Time_Clock-PicoBlaze_Real_Time_Clock
alu_code_asif
- vhdl code for ALU.i think by reading his code..it will be very easy for you to design an Alu.
mesh_dft
- 自己写一个关于维mesh结构的noc网络，verilog，仿真结果无误。-Write their own structure on the noc-dimensional mesh network, verilog, accurate simulation results.
router_fifo
- 自己写的一个片上网络路由节点的fifo模块，工作频率达到1ghz。-Himself wrote a piece on the network routing node of the fifo module, the work frequency of 1ghz.
pwm__vhdl
- 一个基于vhdl语言的脉冲宽度调制。并且有两个脉冲输出-Vhdl language-based pulse width modulation. And two pulse output
router_fifo
- 自己写的一个片上网络路由节点的fifo模块，工作频率达到1ghz。-Himself wrote a piece on the network routing node of the fifo module, the work frequency of 1ghz.
uart_my
- 自己设计的串口verilog代码，已在fpga上跑过，问题无误。-Serial verilog design code, ran in the fpga, correct the problem.
vaa
- （１）设计一个4位十进制的频率计其测量范围1Hz~9.999KHz；6 N3 G8 k( U- @ n* A （２）记数过程结束后，保存并显示结果；-(1) to design a metric four of its frequency range 1Hz ~ 9.999KHz 6 N3 G8 k (U-@ ' n* A (2) After the counting process, preserve and display the results
fft_fpga
- 自己写的一个关于fpga开发的fft模块。-Wrote it myself on the development of fpga module fft.